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| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-10-16 16:08:55 -0700 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-11-01 15:37:09 +0000 |
| commit | a7a6522c241c09304ce5059753da3fe4d5ba1371 (patch) | |
| tree | 69b4d7a10bcf4877d26b444ab86d3052e460542f /payloads/libpayload/arch/arm/cache.c | |
| parent | 44d0a137b5a56c2ab487083f967a4f4fac78cdcf (diff) | |
soc/intel/meteorlake: Adjust Power State Current 2 threshold
VccSA Power State 2 (PS2) current threshold has be adjusted to 10A to
improve PS2 residency which reduces Voltage Regular (VR) power loss.
BUG=b:308002192
TEST=power and performance analysis shows a positive Load Line result
Change-Id: I2da2b05de8a04f91dacaa55062165c4351422865
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78653
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'payloads/libpayload/arch/arm/cache.c')
0 files changed, 0 insertions, 0 deletions