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authorStefan Reinauer <reinauer@chromium.org>2013-05-17 11:56:09 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-11-25 23:31:34 +0100
commit441a4baf87ada2608a109a203a5d8040f6dc2b0d (patch)
tree44094b5f24787f9e37fca285a46a7c4822d789b6 /payloads/libpayload/Makefile
parented095ca39a99d7dcc94856612cfff5695bd87ae6 (diff)
libpayload (EHCI): correctly align PORTSC
Two structures in the USB EHCI stack were pointing to hardware but not marked attribute((packed)) hence leaving it to GCC to correctly align the data structures. Next, the number of reserved bytes in hc_op_t was wrong (but implicitly aligned to the correct values on x86) It seems this worked fine on x86, but on ARM it was doing the wrong thing. Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: I94bed4850ded7d3f7bbc7ff3079c103c6054c22d Reviewed-on: https://gerrit.chromium.org/gerrit/55555 Commit-Queue: Stefan Reinauer <reinauer@google.com> Reviewed-by: Stefan Reinauer <reinauer@google.com> Tested-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/4174 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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