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authorMichael Niewöhner <foss@mniewoehner.de>2019-09-22 21:56:17 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-10-31 10:35:52 +0000
commit5ce66da1b5ad873cbaa694c850f8816074837e02 (patch)
treef3b9040dad2695186102683f4f42b5fc6915c0dd /payloads/external/linux
parentaf1cbe2278b4ca3252d48ba36814db940e9d4237 (diff)
soc/intel/common: add common function to set LT_LOCK_MEMORY
Add a common function for setting LT_LOCK_MEMORY via MSR 0x2E7, which locks most of the chipset BAR registers in accordance to Intel BWG. Change-Id: I4ca719a9c81dca40181816d75f4dcadab257c0b3 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36339 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'payloads/external/linux')
0 files changed, 0 insertions, 0 deletions