mb/google/brox/jubilant: Update dptf settings

Update dptf settings from thermal design:
1) Remove fan control and active policy,
   since fan is controlled by EC.
2) Modify TSRs to 0:DRAM, 1:SOC, 2:Charger
3) Update Pl2 min&max values

BUG=None
TEST= Build jubilant firmware
      Generate and check ACPI SSDT.dsl
      $ cat /sys/firmware/acpi/tables/SSDT > SSDT
      $ iasl -d SSDT

Change-Id: I2d59eedea9fb25565709e118abc1a14b4c2a64e7
Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com>
Reviewed-by: Bob Moragues <moragues@google.com>

0 files changed, 0 insertions, 0 deletions