diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2022-04-13 16:26:56 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-19 13:02:33 +0000 |
| commit | 40e461a00ca8ce457c52438e3ab77e145d940db8 (patch) | |
| tree | 7dddc655be494df09bb290063a2a62ec6d5f8a02 /payloads/external/depthcharge | |
| parent | 51e00e60e00d90bc27d180997dcce97ca073dfc4 (diff) | |
soc/intel/alderlake: Enable Pre Reset CPU Telemetry
Insert CSE timestamps to coreboot timestamp table.
BUG=b:182575295
TEST=Boot to OS on Brya Redrix board.
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Ifbea7155a294e0039a5bd1d16588775e90a29ae3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63616
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'payloads/external/depthcharge')
0 files changed, 0 insertions, 0 deletions