diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2016-03-01 17:01:35 -0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2016-03-12 09:23:15 +0100 |
commit | d68e0476e9d8249c6cee28ca526d2e8818d703a4 (patch) | |
tree | 8dda149644b6a8d5654ea38348b70c6f7af5d964 /payloads/external/SeaBIOS | |
parent | d47d77692aedb154c6104f50527d0819523bce20 (diff) |
intel/skylake: Do not log wake source on reset
Skip logging a wake source when just resetting without coming from
S3 or S5 state. This will prevent the occasional spurious event
like PCI PME from showing up in the event log.
BUG=chrome-os-partner:40635
BRANCH=glados
TEST=run warm reboot teset on chell and ensure no wake source is logged
Change-Id: If739034dc9022b37c90b9cc849a00c604383e70f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e7b5cc91adc3ed10df7cebd758cf8144216b9890
Original-Change-Id: I16f4f98df8c70fd25986a8b3644334c7209fd083
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/329846
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/331173
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13991
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'payloads/external/SeaBIOS')
0 files changed, 0 insertions, 0 deletions