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authorWonkyu Kim <wonkyu.kim@intel.com>2020-01-21 21:54:14 -0800
committerSubrata Banik <subrata.banik@intel.com>2020-01-24 09:53:14 +0000
commitd250063c09d432cff563331a3dfb158d7c6a7a46 (patch)
tree382a06863e41a9b1d29980eb7ff51fb64a2aa40a /payloads/external/GRUB2
parent815d96a975d67db73b8299b3c521b74cf9725b99 (diff)
mb/intel/tglrvp: Enable SATA
Enable both SATA ports for TGLRVP. BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board with SATA memory Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com> Change-Id: I9f35682982a6c06522e58b0bbd7162ff02c37f32 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38505 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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