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authorOskar Enoksson <enok@lysator.liu.se>2011-10-06 18:43:43 +0200
committerMarc Jones <marcj303@gmail.com>2011-10-17 09:30:25 +0200
commite2c05da300037e6d92bbb833f945ab05421978e5 (patch)
tree489cd39931cb14912082d7ae2a3533676460c7b0 /payloads/external/FILO
parent3128685a918ee9c67a50f9753874b794008c8607 (diff)
Fixes several issues with amd k8 SSDT P-state generation
First issue fixed: For multi-socket CPU the current implementation emitted Processor objects for cores in the first CPU only. This commit fixes the bug by really emitting one Processor object for each core. However, the unlikely case of mixed CPU models is still not handled correctly. Second issue fixed: One loop was wrong in case a processor in the table declares no P-states at all. The rewritten loop is safe. Some possibly dangerous array lengths were also fixed. Third issue: on MP-boards the recommended ramp-voltage (RVO) is 0mV according to the BKDG. The current implementation always set it to 25mV. This commit selects 0 or 25mV depending on CONFIG_MAX_PHYSICAL_CPUS. Fourth issue: If a processor without PowerNow! support was inserted in a system with coreboot configured with SET_FIDVID then the boot process hanged mysteriously and very early. Apparently because init_fidvid_ap tampers with non-existing registers. This commit fixes the bug by bailing out from init_fidvid_ap if PowerNow! capability is missing. Signed-off-by: Oskar Enoksson <enok@lysator.liu.se> Change-Id: I61f6e2210b84ccba33a36c5efc866447b7134417 Reviewed-on: http://review.coreboot.org/239 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
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