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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-07-21 18:11:14 +0200 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-07-29 15:01:55 +0000 |
| commit | 82043f5a3666e364a052cf14a90894f99c3a5944 (patch) | |
| tree | 923b7602021fc4ccc17d786435cb7e846ef46e71 /payloads/coreinfo | |
| parent | a01b62a573d580a7b6ef3a50b4d33b4d3263715b (diff) | |
soc/intel/alderlake: Add missing TDP and Power Limits for ADL-S
Add TDP and Power Limit settings for ADL-S 8+8 150W, 4+0 and 2+0.
The System Agent PCI IDs were not present in older 2.1 revision of
DOC #619501. Now that the mapping of these IDs to SKUs is known, fill
the missing TDPs and Power Limit settings based on DOC #626343.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I23dd8478e60bcc81a1048f2f6e6717dd281d1a69
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66053
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'payloads/coreinfo')
0 files changed, 0 insertions, 0 deletions