diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-02-10 16:07:44 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-15 09:58:05 +0000 |
commit | 59626b8670da326ab725e67b01dd1025b0a34a86 (patch) | |
tree | 134546b7b368dadb93f0d7c8542b4fd0fbc08dd0 /payloads/coreinfo | |
parent | 9cf9b8547669507e46039702194fec9eb364a2e4 (diff) |
drivers/spi: Stop using a variable-length array
Only the call in `spi_flash_cmd_write_page_program` uses non-constant
values for the array length. However, the value for `data_len` has an
upper bound: `flash->page_size` is set to `1U << vi->page_size_shift`
which depends on the flash chip vendor info, and the largest value it
can currently have is 8. Thus, the maximum page size is currently 256.
Define the `MAX_FLASH_CMD_DATA_SIZE` macro to place an upper bound on
the amount of data that can be written in one command. Then, use this
value to allocate a fixed-size buffer in `spi_flash_cmd_write`. Also,
add a check to prevent buffer overflow problems. Finally, ensure that
the `spi_flash_cmd_write_page_program` function always writes no more
than 256 bytes of data when using the `spi_flash_cmd_write` function.
Tested on Asrock B85M Pro4 (Winbond W25Q64FV), MRC cache still works.
Change-Id: Ib630bff1b496bc276616989d4506a3c96f242e26
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'payloads/coreinfo')
0 files changed, 0 insertions, 0 deletions