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authorYidi Lin <yidilin@chromium.org>2024-05-24 15:27:24 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-06-05 11:09:16 +0000
commit6643b5e37418999849a7c8055be1783f819b6293 (patch)
tree2859b3a9b7f50240988a757d2f5489f9ed9b7460 /payloads/coreinfo
parent628b8ed549ce109ab01617d62d74891b07fedf31 (diff)
libpayload/arm64: Support FEAT_CCIDX
ARM SoC supports FEAT_CCIDX after ARMv8.3. The register field description of CCSIDR_EL1 is different when FEAT_CCIDX is implemented. If numsets and associativity from CCSIDR_EL1 are not correct, the system would hang during mmu_disable(). Rather than assuming that FEAT_CCIDX is not implemented, this patch adds a check to dcache_apply_all to use the right register format. Reference: - https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/12770 BUG=b:317015456 TEST=mmu_disable works on the FEAT_CCIDX supported SoC. Change-Id: I892009890f6ae889e87c877ffffd76a33d1dc789 Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82636 Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'payloads/coreinfo')
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