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authorPatrick Rudolph <patrick.rudolph@9elements.com>2024-10-23 19:27:04 +0200
committerLean Sheng Tan <sheng.tan@9elements.com>2024-11-16 22:08:02 +0000
commitf618b265adb434423ad8c06466e4575c7372f60e (patch)
tree9c48364f84bf54d9a05115f25027eb9d73adfb68 /payloads/coreinfo/ramdump_module.c
parent5004c78ef71ce94f53c9c7ddc18f073348f4b324 (diff)
soc/intel/xeon_sp/skx: Load microcode
Update microcode on BSP before MPinit and on all APs if necessary. When the APs already have a MCU loaded, MPinit will skip the update. This aligns the code with other platforms that attempt to update the microcode in MPinit even when FIT already has loaded a MCU. Drop the UPD PcdCpuMicrocodePatchBase to prevent FSP-S from updating MCU before MPinit runs. Reduced code differences between SKX and CPX and will allow to merge the codebase into one. Change-Id: I7df6f82055a879a738fd29092e750084557bbd5c Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84848 Reviewed-by: Shuo Liu <shuo.liu@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/coreinfo/ramdump_module.c')
0 files changed, 0 insertions, 0 deletions