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| author | Furquan Shaikh <furquan@google.com> | 2019-02-04 23:03:04 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2019-02-06 17:38:00 +0000 |
| commit | eaf83489f619ec974943c53b006f17042e3b7b9e (patch) | |
| tree | c0fce1a0cb025aee4783ccd2dad1f30a4e05de25 /payloads/coreinfo/nvram_module.c | |
| parent | 946fa5f9418f0bff49c1dc90492c08e79f47a81f (diff) | |
mb/google/hatch: Configure I2C buses
This change enables I2C bus 2, 3 and 4 in devicetree and configures
GPIO pads for the same. It also configures pads for I2C5 as
no-connect.
BUG=b:123711244
TEST=Verified that i2c shows up in "i2cdetect -l" after booting to OS.
Change-Id: Ib4714a670d73228332115415e4393f82802c6475
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/31237
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/coreinfo/nvram_module.c')
0 files changed, 0 insertions, 0 deletions