diff options
| author | Christopher Kilgour <techie@whiterocker.com> | 2008-04-19 13:32:19 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2008-04-19 13:32:19 +0000 |
| commit | 7bc63fd2cbe5b512b982ee0a0c5a1552f4f3e249 (patch) | |
| tree | 3d647a802ea18275ac58fc18f5ee340343e38eeb /payloads/coreinfo/nvram_module.c | |
| parent | 59711210093b028a69e3292a2558a5c40339c5d2 (diff) | |
This trivial patch adds the SMSC SCH3112 Super I/O chip ID to the
generic SMSC support, and corrects a small typo.
With this patch, coreboot v2 on a mainboard with SCH3112 has been
demonstrated to correctly use the serial port. No other chip
functions were tested.
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'payloads/coreinfo/nvram_module.c')
0 files changed, 0 insertions, 0 deletions