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authorMichael Niewöhner <foss@mniewoehner.de>2019-11-03 00:51:27 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-04 11:42:29 +0000
commit4d877c8c7f29785c6860a98b81e48981d0d34aa9 (patch)
treeeccd52876bba98311c9c20b3c1426455c564fb1f /payloads/coreinfo/coreinfo.h
parenta1b700ff74981ecb84e47e132a60d7f0d5312676 (diff)
superio/aspeed/common: add workaround for serial routing delay quirk
Some mainboards with an ASPEED BMC do the serial routing setup in the BMC boot phase on cold boot. This results in scrambled console output when this is not finished fast enough. This adds a delay of 500ms as workaround in the BMCs uart setup that can be selected at mainboard level. A user may disable the workaround when using another BMC firmware like OpenBMC, u-bmc or some custom BMC bootloader with fast serial setup. Change-Id: I7d6599b76384fc94a00a9cfc1794ebfe34863ff9 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36591 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/coreinfo/coreinfo.h')
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