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authorV Sowmya <v.sowmya@intel.com>2020-12-03 23:15:37 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-12-05 05:36:41 +0000
commit2c9d65b51b9ed5af092434d1172a43628ef068d5 (patch)
tree71f84575c0b31f6fb22f76c262f3c6006d8ecc8e /payloads/coreinfo/bootlog_module.c
parent5fc798f40e994b57047512a9fa6ff9a13630cfa4 (diff)
soc/intel/common/block/usb4: Add the PCI ID for ADL
This patch adds the PCI device ID for Alderlake CPU xHCI. Change-Id: I4074a81aa9be2ef3a0956da08bece32a613415ab Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48271 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'payloads/coreinfo/bootlog_module.c')
0 files changed, 0 insertions, 0 deletions