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authorSubrata Banik <subrata.banik@intel.com>2017-10-19 16:40:14 +0530
committerAaron Durbin <adurbin@chromium.org>2017-10-19 17:36:16 +0000
commited1694157c4f14d4ce60e7c053ea044aca6777fb (patch)
tree36dd2a267e92bc62cc56bf656f151963c7df778d /gnat.adc
parentf506cf0b8dd3914826d55bf7e120f5ed826e438b (diff)
soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size
Avoid calling calculate_dram_base() function to get chipset reserved memory size during pci resource allocation. Rather use EBDA to store chipset reserved memory size while calling cbmem_top_int(). This patch avoids one extra calculate_dram_base() call. BRANCH=none BUG=b:63974384 TEST=Ensures DRAM based resource allocation has taken care of Intel SoC reserved ranges. Change-Id: I2771ea55253ca7d16cd2e2951889ab092b47a9b1 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22099 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'gnat.adc')
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