soc/amd/{cezanne,picasso,stoney}: Clear PM/GPE when enabling ACPI

According to https://uefi.org/specs/ACPI/6.4/16_Waking_and_Sleeping/sleeping-states.html?highlight=power%20states#

> For ACPI/legacy systems, when transitioning from the legacy to the G0
> working state this register is cleared by platform firmware prior to
> setting the SCI_EN bit.

This change makes sure we clear the PM/GPE blocks are cleared before
enabling the SCI_EN bit.

BUG=b:172021431
TEST=Boot guybrush and morphius to OS and verify suspend resume still
works.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Icc6f542185dc520f8d181423961b74481c0b5506
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59928
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

0 files changed, 0 insertions, 0 deletions