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| author | Vincent Palatin <vpalatin@chromium.org> | 2012-08-07 17:03:40 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-07 05:16:04 +0100 |
| commit | fa90fd4f2f4aab4da25bb0c89cb408de36443a25 (patch) | |
| tree | d4ab0fb3ca5d58286d20278219d29c10195862b8 /documentation | |
| parent | becacec022602ae1ab876c58d8ae69092327b9fe (diff) | |
rtc: erase CMOS memory after power failure
When a power failure happens on the RTC rail, the CMOS memory (including
the RTC registers) is filled with garbage.
So, we erase the full first bank (112 bytes) and we reset the RTC date
to the build date.
To test, disconnect the CMOS battery to produce an RTC power
failure, then boot the machine and observe the RTC date is the build
date using "cat /sys/class/rtc/rtc0/date"
Change-Id: I684bb3ad5079f96825555d4ed84dc0f7914e9884
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: http://review.coreboot.org/1697
Reviewed-by: Marc Jones <marcj303@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'documentation')
0 files changed, 0 insertions, 0 deletions