diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-08-08 16:28:41 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 12:02:43 +0100 |
| commit | 727b5455fbdd3003005da83039f92c96354b53a2 (patch) | |
| tree | ac0117d905bc9523f423e2c404e0193df7d1d780 /documentation/codeflow.svg | |
| parent | 7e1c83e31bdd4b0aeebb2ed0916959a472c2369f (diff) | |
Add a specific post code for S3 resume failures
If the firwmare is flashed and the MRC cache is blown away
then it is not possible to resume.
Right now this can be inferred from the event log but it can
be made very clear by adding a unique post code for this event.
1) boot falco
2) flash firmware
3) suspend and then resume
4) check for post code 0xef in log
0 | 2013-08-08 16:27:47 | Log area cleared | 4096
1 | 2013-08-08 16:27:47 | ACPI Enter | S3
2 | 2013-08-08 16:27:55 | System boot | 48
3 | 2013-08-08 16:27:55 | Last post code in previous boot | 0xef | Resume Failure
4 | 2013-08-08 16:27:55 | System Reset
5 | 2013-08-08 16:27:55 | ACPI Wake | S5
Change-Id: I7602d9eef85d3b764781990249ae32b84fe84134
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65259
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4458
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'documentation/codeflow.svg')
0 files changed, 0 insertions, 0 deletions