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authorAaron Durbin <adurbin@chromium.org>2018-04-17 08:45:36 -0600
committerPatrick Georgi <pgeorgi@google.com>2018-04-23 09:16:31 +0000
commit2b72e6bdfd63737d03efd02cb7f66a769243727f (patch)
treeb96fc47b44469e4054abea1f312d68590c9aad7d /configs
parent9a1bb36137921c751173d6726a06019c84b171f5 (diff)
util/x86/x86_page_tables: update PAT mapping to match linux
The linux kernel uses the following mapping for PAT entries: PTE encoding: PAT |PCD ||PWT PAT ||| slot 000 0 WB : _PAGE_CACHE_MODE_WB 001 1 WC : _PAGE_CACHE_MODE_WC 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS 011 3 UC : _PAGE_CACHE_MODE_UC 100 4 WB : Reserved 101 5 WP : _PAGE_CACHE_MODE_WP 110 6 UC-: Reserved 111 7 WT : _PAGE_CACHE_MODE_WT Update the page table generator to match what the linux kernel is using. This just makes things consistent with linux. BUG=b:72728953 Change-Id: Ie5ddab5c86d4e03688d7e808fcae34ce954b64f9 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25711 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
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