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authorReka Norman <rekanorman@google.com>2022-03-30 12:44:24 +1100
committerPaul Fagerburg <pfagerburg@chromium.org>2022-04-01 13:44:52 +0000
commit390c3f2b47fb9d9363cb2770e50c1977d0dcf418 (patch)
treebf332c810966da895987b9bfe2018de14946c44f /configs/config.pcengines_apu2
parent56ed0bee8697a56b08ecfac0b8cb8a9cc312592a (diff)
mb/google/brya/var/nereid: Enable AUX DC biasing on C0 and C1
C0 has no redriver, so enable SBU muxing in the SoC. C1 has a redriver which does SBU muxing, so disable SBU muxing in the SoC. However, this also disables AUX biasing when the pins are configured as NF6. So instead configure the C1 AUX bias pins as GPO. BUG=b:227259673 TEST=Voltages are correct on the C0 and C1 AUX bias pins Change-Id: Ic0af662ecc1c6cee15b4ae98cb02deeefc93a71e Signed-off-by: Reka Norman <rekanorman@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63199 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
Diffstat (limited to 'configs/config.pcengines_apu2')
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