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| author | John Zhao <john.zhao@intel.com> | 2020-07-28 11:36:07 -0700 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2020-07-29 22:46:57 +0000 |
| commit | efcfaa8b6c954fa3b97a9e7a459a1f1cf13c8bc9 (patch) | |
| tree | 4fcf4bcd02fa0998b82ced7b86c8f26af48acf44 /configs/config.pcengines_apu1 | |
| parent | 5fdf2760a5952df22e5b331bc4f62082d8cec1bc (diff) | |
mb/intel/tglrvp: Update TCSS D3Hot and D3Cold configuration
It is expected both of TCSS D3Hot and D3Cold are enabled by default.
BUG=None
TEST=Verified both of TCSS D3Hot and D3Cold configuration on TGLRVP.
Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: Id569d8191f82f12379b57a9c50aec31776220bb5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44003
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Ravishankar Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Diffstat (limited to 'configs/config.pcengines_apu1')
0 files changed, 0 insertions, 0 deletions