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| author | Tim Chu <Tim.Chu@quantatw.com> | 2022-12-08 09:02:34 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-10 15:55:02 +0000 |
| commit | 6e0c78b87fe4bad7f02b893bf1f1ce8d3bbf84d8 (patch) | |
| tree | b8b6aa41f01d97c98a624e618f6bb5d90c0bfa15 /configs/config.intel_galileo_gen2.fsp2.0 | |
| parent | ebe7f7cee041ebc4e40de095c4d4f61472213b92 (diff) | |
soc/intel/common/block/fast_spi: Add SPI BIOS decode lock
The SPI BIOS decode lock bit needs to be set, according to
Intel EBG EDS dodcumentation.
Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: I3366817b42a5878f16575698ebc546fa7852e285
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Diffstat (limited to 'configs/config.intel_galileo_gen2.fsp2.0')
0 files changed, 0 insertions, 0 deletions