summaryrefslogtreecommitdiff
path: root/configs/config.intel_galileo_gen1
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-07-03 14:28:48 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-12 09:57:34 +0000
commitc05c2b3fb25ca42a75ecc987178c298f7fe0ead5 (patch)
treeab91d94d7564cdf16191f2335294877dc8e7fc5a /configs/config.intel_galileo_gen1
parent14c4f4f43cc5a1cdcb2769357cee7e00fd620e93 (diff)
haswell boards: Fix writes to 16-bit DxxIR registers
The DxxIR (Device xx Interrupt Route) registers in RCBA are 16-bit wide, so do not use 32-bit operations to program them. Note that the DxxIP (Device xx Interrupt Pin) registers are 32-bit, so using 32-bit operations on them is correct. Change-Id: I9699b98d5fcd26b2c710bf018f16acc65dcb634e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43107 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Diffstat (limited to 'configs/config.intel_galileo_gen1')
0 files changed, 0 insertions, 0 deletions