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| author | Martin Roth <martinroth@chromium.org> | 2020-07-15 11:50:37 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2020-07-16 22:20:27 +0000 |
| commit | 37d1206c6ebd80c14f350d5eddfc1b17b6d9a705 (patch) | |
| tree | 8120c485eceff92ade7e3c5118901119d5da6c4d /configs/config.intel_coffeelake_rvp11.fsp_car | |
| parent | 6812626382548691e1b7c4828175859ee3fd0144 (diff) | |
soc/amd/picasso: Get rid of VERSTAGE_SIZE
Currently, the code and data in psp_verstage is ~59K. Adding the code
to save vbnv to the SPI rom increases that to 66K.
Getting rid of VERSTAGE_SIZE allows verstage to grow as it needs to.
BUG=b:161366241
TEST=Build & Boot Morphius with VBOOT_VBNV_CMOS_BACKUP_TO_FLASH enabled
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Ic6853b70073f9e781fc10402a2a47c9c8e0d49d3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43486
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'configs/config.intel_coffeelake_rvp11.fsp_car')
0 files changed, 0 insertions, 0 deletions