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authorSumeet R Pawnikar <sumeet.r.pawnikar@intel.com>2020-07-20 15:44:59 +0530
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-07-25 00:07:36 +0000
commit1a621507098a16de167f2904aa2f9f23e9bff800 (patch)
tree3df2560e747babc3b6df5d15f98a449066f19888 /configs/config.google_reef_cros
parent60f178db65ca2a804da0cb887bf1d6d737b8235f (diff)
soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU
Set power limits in devicetree for Tiger Lake Y-SKU based volteer variant boards. BUG=b:152639350 BRANCH=None TEST=Built and tested power limits on volteer variant board. Change-Id: If4f1226473b48365e5962df9fff29910c99007fc Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43607 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Caveh Jalali <caveh@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'configs/config.google_reef_cros')
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