diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2021-09-30 18:14:09 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-10-06 19:03:31 +0000 |
| commit | c6e2552ce6f97033f0da735e53407fd5663d2816 (patch) | |
| tree | d50d145b604cd87f52095ae62a5209674a5a66ba /configs/config.google_panther.pch_serialio_uart | |
| parent | db16ac95789d5ecc736c586c261c5e87358b718b (diff) | |
soc/intel/common/../cse: Allow D0i3 enable/disable for all CSE devices
This patch ensures to pass cse device function number as argument for
`set_cse_device_state()` to allow coreboot to perform enable/disable of
D0i3 bit for all CSE devices to put the CSE device to Idle state or
Active state.
BUG=b:200644229
TEST= Able to build and boot ADLRVP where `set_cse_device_state()` is
able to put the CSE device toidle state or active state based on `devfn`
as argument.
Change-Id: Ibe819e690c47453eaee02e435525a25b576232b5
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58039
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'configs/config.google_panther.pch_serialio_uart')
0 files changed, 0 insertions, 0 deletions