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authorFurquan Shaikh <furquan@google.com>2021-01-08 11:48:52 -0800
committerPatrick Georgi <pgeorgi@google.com>2021-01-11 07:42:12 +0000
commit696f4ea0f52b37a299197edfc71acb422151834a (patch)
treeef6b1c04fe5d79f80cfdf8da855da1dbd892241c /configs/config.asus_p2b_ramdebug
parent708f25e8faf64c0b19bb73748cf7a073495066a5 (diff)
soc/amd/cezzane: Add a minimal chipset tree
This change adds a minimal chipset tree with only two devices: 1. Domain 2. GNB root complex This allows sconfig to generate the config structure for SoC root device that is used by config_of_soc(). Change-Id: I7e08ecf4b9556dc9325bd5a6a51566a949ceb73f Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49245 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Diffstat (limited to 'configs/config.asus_p2b_ramdebug')
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