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| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2019-08-31 11:38:33 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-12 13:14:39 +0000 |
| commit | b9d075b0fc12c26316eaaca2de6bfa659f0cb6c1 (patch) | |
| tree | bd2eb747d26da36f66cca594462d3ef4c8212ad0 /configs/builder/config.lenovo_x220i | |
| parent | bc553e6a5beee3db02cfd27e3a5e410857e78897 (diff) | |
src/soc/intel/common/block/cse: Make hfsts1 common & add helper functions
Host FW status 1 (FWSTS1/HFSTS1) register definition is common across SoCs,
hence move it to common. Also add below helper function,
* wait_cse_sec_override_mode() - Polls ME status for "HECI_OP_MODE_SEC_OVERRIDE".
It's a special CSE mode, the mode ensures CSE does not trigger any
spi cycles to CSE region.
* set_host_ready() - Clears reset state from host CSR.
TEST=Verified CSE recover mode on CML RVP & Hatch board
Change-Id: Id5c12b7abdb27c38af74ea6ee568b42ec74bcb3c
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35226
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Diffstat (limited to 'configs/builder/config.lenovo_x220i')
0 files changed, 0 insertions, 0 deletions