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author | Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> | 2021-12-02 21:10:41 +0800 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2021-12-08 11:32:02 +0000 |
commit | d22e921178bcbdf1c72a19f95a1067f9074aaf58 (patch) | |
tree | 31edf64b7a386c092825a38821bf977e272a9f64 /configs/builder/config.lenovo_t520 | |
parent | c5432ec0980a9afff89d270d234765f8cf5272b6 (diff) |
soc/mediatek/mt8186: revise SPI NOR GPIO selection
The setting of SPI NOR GPIOs should be:
CS: pull up.
CLK/IO0/IO1: pull down.
BUG=b:202871018
TEST=build pass
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ideacb797a1dc9999ab6ba00cf33adbbbc24213dc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59940
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'configs/builder/config.lenovo_t520')
0 files changed, 0 insertions, 0 deletions