diff options
| author | Shuo Liu <shuo.liu@intel.com> | 2024-10-22 04:08:11 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-10-23 10:30:26 +0000 |
| commit | 495b705137b2efe9cb5c304d0471b836aa296c98 (patch) | |
| tree | d6c18000a37677f2aeddb19d8497d0e95521ae32 /configs/builder/config.intel.crb.avc | |
| parent | 1c088e6d620e2255d506d718b45afa5d48ecdff5 (diff) | |
configs/builder: Update PBP path for Gen6 Xeon-SP boards
Gen6 Xeon-SP boards needs to be provided with platform boot policy
blob.
Change-Id: I22b944ab6bcb2b9d0797833c06410bdc523e2709
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84820
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'configs/builder/config.intel.crb.avc')
| -rw-r--r-- | configs/builder/config.intel.crb.avc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/configs/builder/config.intel.crb.avc b/configs/builder/config.intel.crb.avc index eadcaf2cd8..e547c4148f 100644 --- a/configs/builder/config.intel.crb.avc +++ b/configs/builder/config.intel.crb.avc @@ -13,6 +13,7 @@ CONFIG_CONFIGURABLE_RAMSTAGE=y CONFIG_NO_GFX_INIT=y CONFIG_HAVE_IFD_BIN=y +CONFIG_HAVE_PBP_BIN=y CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y CONFIG_ADD_FSP_BINARIES=y @@ -25,6 +26,7 @@ CONFIG_CONSOLE_SERIAL_115200=y # [RW] IFWI Ingredients # CONFIG_IFD_BIN_PATH="site-local/avenuecity/descriptor.bin" +CONFIG_PBP_BIN_PATH="site-local/avenuecity/pbp.bin" CONFIG_CPU_UCODE_BINARIES="site-local/avenuecity/ucode.mcb" CONFIG_FSP_T_FILE="site-local/avenuecity/Server_T.fd" CONFIG_FSP_M_FILE="site-local/avenuecity/Server_M.fd" |