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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2010-03-01 10:30:08 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-03-01 10:30:08 +0000
commit55cf7bcbeb605648ccfa2fdab102506f87388c07 (patch)
treec92cc09324c72d674692022b97e622d39a10c485 /README
parent72f75b1c8b3a5513e467cea1af745bcbd310e881 (diff)
Allow per-board setting of HT clock and width so
less than optimal PCB designs can still work reliably with reduced clock. Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5179 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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