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authorNico Huber <nico.huber@secunet.com>2017-08-17 16:08:00 +0200
committerNico Huber <nico.h@gmx.de>2017-08-21 14:20:25 +0000
commit6278867065e0849ba54ed7022fc9aab819daaaaf (patch)
treecab62f8a58a8f7d9d1ae5c95cc2ecc1b5abd8fb0 /README
parent3f09b0ffef990286ecca344cf73023b35be42406 (diff)
soc/intel/common/smbus: Don't clear random bits
FSP might have done some settings for us there. Use pci_update_config32() since the register is documented to be 32 bits wide. Change-Id: I995e8a731a6958f10600174d031bb94f5a0a66db Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/21072 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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