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authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-14 01:06:22 +0300
committerFelix Held <felix-coreboot@felixheld.de>2023-04-29 02:36:27 +0000
commit5fc0afbc170960d05012eec9b3b8717f65a07478 (patch)
tree193b04832fbed42e857562fd1ce9b0c4fc9c1335 /README.md
parentd1211cb3de2546480cc1179262d31fed9e1eea9a (diff)
asus/p2b, emu/qemu-i440fx: Use acpigen_write_processor_device()
FADT duty_width/duty_offset fields, together with P_CNT (previously P_BLK) IO address are provided with _PTC entry. FADT p_lvl2/3_lat fields had values that disabled C2/C3 state transitions so _CST entries are not required. Change-Id: I629cd0793f6a64e955e197400efaa7d9d898e775 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74440 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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