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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2021-10-07 12:44:21 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-11 12:49:29 +0000 |
| commit | 645b4d6efcd827a6333bfd9c9c229ba8a48b8226 (patch) | |
| tree | 81cf0c3909b8acb07b4bcfa6b0fb5671ae0f1e27 /Makefile | |
| parent | 4951fe1fb7cb50058aeb80f49403509caa263541 (diff) | |
mb/siemens/mc_ehl2: Disable INTEL_LPSS_UART_FOR_CONSOLE
This mainboard uses an eSPI-to-LPC bridge for console output. For this
reason, the internal LPSS UART must be disabled.
Change-Id: I86777cf719def331f4d257ddd94e9a87125ebce8
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'Makefile')
0 files changed, 0 insertions, 0 deletions