diff options
| author | Martin Roth <gaumless@gmail.com> | 2021-11-23 12:39:44 -0700 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2022-07-17 22:17:10 +0000 |
| commit | 4d7285df1d3c7e48100ed39b030b67a7bcf07d0e (patch) | |
| tree | e62f372424149c1c01fe5b7d6e41a8f821a07970 /Makefile | |
| parent | 55d0f40734e64e38c1a46b96266daf468c5efad6 (diff) | |
Makefile: Add util/kconfig/Makefile.real to nocompile list
Messages shown with the '$(info ...)' Make command could be shown twice
because the entire Makefile stack was evaluated twice at MAKELEVEL 0.
The first time was to generate the build/util/kconfig/Makefile.real
file. The second time was to do the rest of the build. Adding the
kconfig Makefile.real file to the nocompile list prevents all the rest
of the coreboot makefiles from being read in during that first step,
which prevents the messages from being printed twice.
You can see this behavior by running "make clean; make -d" and searching
for the text:
"Successfully remade target file 'build/util/kconfig/Makefile.real'."
This breaks when the build target is 'tools', so add an exception for
just that target.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: If29c3a84c7c82ea099ef9610f4ecaa599f0d8649
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59607
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 14 |
1 files changed, 11 insertions, 3 deletions
@@ -31,6 +31,7 @@ KCONFIG_TRISTATE := $(obj)/tristate.conf KCONFIG_NEGATIVES := 1 KCONFIG_STRICT := 1 KCONFIG_PACKAGE := CB.Config +KCONFIG_MAKEFILE_REAL ?= $(objk)/Makefile.real COREBOOT_EXPORTS += KCONFIG_CONFIG KCONFIG_AUTOHEADER KCONFIG_AUTOCONFIG COREBOOT_EXPORTS += KCONFIG_DEPENDENCIES KCONFIG_SPLITCONFIG KCONFIG_TRISTATE @@ -44,6 +45,7 @@ CONFIG_SHELL := sh KBUILD_DEFCONFIG := configs/defconfig UNAME_RELEASE := $(shell uname -r) HAVE_DOTCONFIG := $(wildcard $(DOTCONFIG)) +HAVE_KCONFIG_MAKEFILE_REAL := $(wildcard $(KCONFIG_MAKEFILE_REAL)) MAKEFLAGS += -rR --no-print-directory # Make is silent per default, but 'make V=1' will show all compiler calls. @@ -87,14 +89,20 @@ help_coreboot help:: # Order _does_ matter for pattern rules. include $(srck)/Makefile.inc -# Three cases where we don't need fully populated $(obj) lists: +# The cases where we don't need fully populated $(obj) lists: # 1. when no .config exists -# 2. when make config (in any flavour) is run -# 3. when make distclean is run +# 2. When no $(obj)/util/kconfig/Makefile.real exists and we're building tools +# 3. when make config (in any flavour) is run +# 4. when make distclean is run # Don't waste time on reading all Makefile.incs in these cases ifeq ($(strip $(HAVE_DOTCONFIG)),) NOCOMPILE:=1 endif +ifeq ($(strip $(HAVE_KCONFIG_MAKEFILE_REAL)),) +ifneq ($(MAKECMDGOALS),tools) +NOCOMPILE:=1 +endif +endif ifneq ($(MAKECMDGOALS),) ifneq ($(filter %config %clean cross% clang iasl lint% help% what-jenkins-does,$(MAKECMDGOALS)),) NOCOMPILE:=1 |