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authorRonald G. Minnich <rminnich@gmail.com>2014-11-26 19:25:47 +0000
committerRonald G. Minnich <rminnich@gmail.com>2014-12-01 19:06:43 +0100
commite0e784a456c4d64e5e88ce578371fe6c538db559 (patch)
tree7557a07ab68659eaf81ac50fc860a288055e0845 /Makefile.inc
parent796fe068d3c47f873b82c65cc0591f88f87b0a85 (diff)
Add UCB RISCV support for architecture, soc, and emulation mainboard..
Works in the RISCV version of QEMU. Note that the lzmadecode is so unclean that it needs a lot of work. A cleanup is in progress. We decided in Prague to do this as one thing, because it forms a nice case study of the bare minimum you need to add to get a new architecture going in qemu. Change-Id: If5af15c3a70733d219973e0d032746f8ab027e4d Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/7584 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'Makefile.inc')
-rw-r--r--Makefile.inc5
1 files changed, 4 insertions, 1 deletions
diff --git a/Makefile.inc b/Makefile.inc
index a925d6718e..59d11bdc2c 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -68,7 +68,7 @@ PHONY+= clean-abuild coreboot lint lint-stable build-dirs
subdirs-y := src/lib src/console src/device src/ec src/southbridge src/soc
subdirs-y += src/northbridge src/superio src/drivers src/cpu src/vendorcode
subdirs-y += util/cbfstool util/sconfig util/nvramtool
-subdirs-y += src/arch/arm src/arch/arm64 src/arch/x86
+subdirs-y += src/arch/arm src/arch/arm64 src/arch/x86 src/arch/riscv
subdirs-y += src/mainboard/$(MAINBOARDDIR)
subdirs-y += site-local
@@ -608,6 +608,9 @@ endif
ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y)
ROMSTAGE_ELF := romstage.elf
endif
+ifeq ($(CONFIG_ARCH_ROMSTAGE_RISCV),y)
+ROMSTAGE_ELF := romstage.elf
+endif
ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
ROMSTAGE_ELF := romstage_xip.elf
endif