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authorKarthikeyan Ramasubramanian <kramasub@chromium.org>2020-03-05 01:23:57 -0800
committerPatrick Georgi <pgeorgi@google.com>2020-03-09 21:28:08 +0000
commit8499f7fb1b961f2d3bf1329897d0c6ff97ab5038 (patch)
tree79aa30a5d50695f65f0f44b9906a9bb3d49ccc6e /Makefile.inc
parent3bc41cf7b4a3c5aab69e8c4fd796720cde38a324 (diff)
mb/google/dedede: Add GPIO list
Leave all the GPIOs in not connected state so that they can be configured depending on the use-case. This is done to park the GPIOs in a known safe state. This will also help to ensure that the required GPIOs are configured when the concerned use-cases are enabled. Below GPIOs are configured in Native Function 1 and are required for boot-up. * VCCIN_AUX_VID0 * VCCIN_AUX_VID1 * AP_SLP_S0_L * PLT_RST_L * CPU_C10_GATE_L * GPDs BUG=None TEST=Build and boot the mainboard. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I5293536f66a6b08c9c2d2a6281684755a0c0b1b3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39114 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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