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authorzaolin <zaolin.daisuki@gmail.com>2018-10-31 16:43:43 +0100
committerNico Huber <nico.h@gmx.de>2018-11-19 15:43:37 +0000
commit3313a78e36da73f05da7402699f04909595a0c9d (patch)
tree1dcd09a9df05ec94d15178f929b7ae063fdf7646 /MAINTAINERS
parent0b8aefc6562c64665425617eddd22aec2610bda5 (diff)
northbridge/intel/fsp_*: Remove legacy SoCs
* Remove FSP Sandy/Ivybrige which are unused. * Open Source implementation isn't final but good enough to replace FSP version. * For new ports use NORTHBRIDGE_INTEL_IVYBRIDGE and NORTHBRIDGE_INTEL_SANDYBRIDGE Change-Id: I7b6bc4bfdd0481c8fe5b2b3d8f8b2eb9aa3c3b9e Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/29402 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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-rw-r--r--MAINTAINERS12
1 files changed, 0 insertions, 12 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 825147f843..f972aebf60 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -210,18 +210,6 @@ F: src/soc/intel/fsp_broadwell_de/
F: src/vendorcode/intel/fsp1_0/broadwell_de/
F: src/mainboard/intel/camelbackmountain_fsp/
-INTEL FSP IVYBRIDGE/PANTHERPOINT/CAVECREEK & CRBs
-M: York Yang <york.yang@intel.com>
-S: Supported
-F: src/cpu/intel/fsp_model_206ax/
-F: src/northbridge/intel/fsp_sandybridge/
-F: src/southbridge/intel/fsp_bd82x6x/
-F: src/southbridge/intel/fsp_i89xx/
-F: src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x
-F: src/vendorcode/intel/fsp1_0/ivybridge_i89xx
-F: src/mainboard/intel/cougar_canyon2/
-F: src/mainboard/intel/stargo2/
-
INTEL FSP DENVERTON-NS SOC & HARCUVAR CRB
M: SweeHeng Wong <swee.heng.wong@intel.com>
M: Jeff Daly <jeffrey.daly@intel.com>