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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-06-26 11:59:59 -0600
committerMartin Roth <martinroth@google.com>2017-06-28 18:24:23 +0000
commit12983db91da6b323dbab20b79a86b91e0c3cdc2c (patch)
tree34de45e44f70d3e35fa82f2c012385a041fdb93f /MAINTAINERS
parent9d6b8b4d681a1ee1708441f68957e290a20d791d (diff)
soc/amd/stoneyridge: Revise pci_devs.h file
Now that pci_devs.h is part of soc/ and not used for multiple southbridges: * Remove devices not present in the Stoney Ridge APU * Complete the list to include additional devices besides those in the FCH. BUG=chrome-os-partner:62578372 Change-Id: I1cd2d5e41473f362bbfd28ee93788a292bc33991 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/20370 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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