summaryrefslogtreecommitdiff
path: root/LICENSES/exceptions/GCC-exception-3.1.txt
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-10 16:45:39 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-26 10:52:21 +0000
commitae1b2d49cf0ad09ff8f1e3904a9e7b23d6fb423b (patch)
tree41a0e28f6df404725371c5d5c57162bd9f9653d8 /LICENSES/exceptions/GCC-exception-3.1.txt
parentddc37d69cb29327217151bd15a906177bc7949de (diff)
soc/intel: Introduce ioapic_get_sci_pin()
According to ACPI Release 6.5 systems supporting PIC (i8259) interrupt mechanism need to report IRQ vector for the SCI_INT field. In PIC mode only IRQ0..15 are allowed hardware vectors. This change should cover section 5.2.9 to not pass SCI_INT larger than IRQ15. Section 5.2.15.5 needs follow-up work. Care should be taken that ioapic_get_sci_pin() is called after platform code has potentially changed the routing from the default. It appears touched all platforms except siemens/mc_aplX currently program SCI as IRQ9. Change-Id: I723c207f1dcbba5e6fc0452fe1dbd087fad290ee Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74326 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'LICENSES/exceptions/GCC-exception-3.1.txt')
0 files changed, 0 insertions, 0 deletions