doc/mb/upsquared: Add documentation

This patch adds documentation about the UP² mainboard
and the IFWI used by Apollolake platform.

Change-Id: Ic708ddbd2616eee4e5ec2740b3eac18b408bde38
Signed-off-by: Felix Singer <felix.singer@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

13 files changed, 629 insertions, 16 deletions

diff --git a/Documentation/mainboard/up/squared/bottom.dia b/Documentation/mainboard/up/squared/bottom.dia
new file mode 100644
index 0000000000..f298d669ab
--- /dev/null
+++ b/Documentation/mainboard/up/squared/bottom.dia
diff --git a/Documentation/mainboard/up/squared/bottom.jpg b/Documentation/mainboard/up/squared/bottom.jpg
index f9aa85db50..3c066a23ad 100644
--- a/Documentation/mainboard/up/squared/bottom.jpg
+++ b/Documentation/mainboard/up/squared/bottom.jpg
diff --git a/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.dia b/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.dia
new file mode 100644
index 0000000000..4efc0183e4
--- /dev/null
+++ b/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.dia
diff --git a/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.svg b/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.svg
new file mode 100644
index 0000000000..16f6397de4
--- /dev/null
+++ b/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.svg
@@ -0,0 +1,126 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.0//EN" "http://www.w3.org/TR/2001/PR-SVG-20010719/DTD/svg10.dtd">
+<svg width="14cm" height="10cm" viewBox="399 -216 262 199" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
+  <text font-size="12.8" style="fill: #000000;text-anchor:start;font-family:sans-serif;font-style:normal;font-weight:700" x="460" y="-20">
+    <tspan x="460" y="-20">40 pin GPIO header</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="520" y="-175.575">
+    <tspan x="520" y="-175.575">GND</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="560" y="-203.575">
+    <tspan x="560" y="-203.575">UART1</tspan>
+    <tspan x="560" y="-187.575">TX</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="600" y="-183.575">
+    <tspan x="600" y="-183.575">UART1</tspan>
+    <tspan x="600" y="-167.575">RX</tspan>
+  </text>
+  <g>
+    <rect style="fill: #ffffff" x="400" y="-140" width="260" height="100"/>
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+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="550" y="-105.575">
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+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="510" y="-105.575">
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+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="590" y="-65.575">
+    <tspan x="590" y="-65.575">9</tspan>
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+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="630" y="-65.575">
+    <tspan x="630" y="-65.575">11</tspan>
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+    <tspan x="630" y="-105.575">12</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="590" y="-105.575">
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diff --git a/Documentation/mainboard/up/squared/header_cn16_10pin_uart0.dia b/Documentation/mainboard/up/squared/header_cn16_10pin_uart0.dia
new file mode 100644
index 0000000000..a35245b9cc
--- /dev/null
+++ b/Documentation/mainboard/up/squared/header_cn16_10pin_uart0.dia
diff --git a/Documentation/mainboard/up/squared/header_cn16_10pin_uart0.svg b/Documentation/mainboard/up/squared/header_cn16_10pin_uart0.svg
new file mode 100644
index 0000000000..43efc77ac5
--- /dev/null
+++ b/Documentation/mainboard/up/squared/header_cn16_10pin_uart0.svg
@@ -0,0 +1,112 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.0//EN" "http://www.w3.org/TR/2001/PR-SVG-20010719/DTD/svg10.dtd">
+<svg width="22cm" height="9cm" viewBox="416 112 425 163" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
+  <g>
+    <rect style="fill: #ffffff" x="420" y="140" width="420" height="60"/>
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+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="480" y="236.425">
+    <tspan x="480" y="236.425">UART0</tspan>
+    <tspan x="480" y="252.425">RX</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="440" y="256.425">
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+  </text>
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diff --git a/Documentation/mainboard/up/squared/header_cn22_12pin_spi.dia b/Documentation/mainboard/up/squared/header_cn22_12pin_spi.dia
new file mode 100644
index 0000000000..ab556ff819
--- /dev/null
+++ b/Documentation/mainboard/up/squared/header_cn22_12pin_spi.dia
diff --git a/Documentation/mainboard/up/squared/header_cn22_12pin_spi.svg b/Documentation/mainboard/up/squared/header_cn22_12pin_spi.svg
new file mode 100644
index 0000000000..7853fb7e7c
--- /dev/null
+++ b/Documentation/mainboard/up/squared/header_cn22_12pin_spi.svg
@@ -0,0 +1,165 @@
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+  <g>
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+    <tspan x="370" y="34.425">9</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="450" y="34.425">
+    <tspan x="450" y="34.425">5</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="410" y="34.425">
+    <tspan x="410" y="34.425">7</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="410" y="74.425">
+    <tspan x="410" y="74.425">8</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="530" y="34.425">
+    <tspan x="530" y="34.425">1</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="490" y="74.425">
+    <tspan x="490" y="74.425">4</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="490" y="34.425">
+    <tspan x="490" y="34.425">3</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="530" y="74.425">
+    <tspan x="530" y="74.425">2</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="450" y="74.425">
+    <tspan x="450" y="74.425">6</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="330" y="34.425">
+    <tspan x="330" y="34.425">11</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="330" y="74.425">
+    <tspan x="330" y="74.425">12</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="370" y="74.425">
+    <tspan x="370" y="74.425">10</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:start;font-family:sans-serif;font-style:normal;font-weight:700" x="420" y="-20">
+    <tspan x="420" y="-20">SPI header (CN22)</tspan>
+  </text>
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+    <tspan x="360" y="164.425">GND</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="520" y="164.425">
+    <tspan x="520" y="164.425">GND</tspan>
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+    <tspan x="400" y="144.425">MISO</tspan>
+  </text>
+  <g>
+    <polyline style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" points="480,120 480,91 "/>
+    <polygon style="fill: #000000" points="485,91 480,81 475,91 "/>
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+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="480" y="136.425">
+    <tspan x="480" y="136.425">VCC</tspan>
+    <tspan x="480" y="152.425">1.8V</tspan>
+  </text>
+  <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="320" y="144.425">
+    <tspan x="320" y="144.425">#HOLD</tspan>
+  </text>
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+    <tspan x="400" y="-55.575">CLK</tspan>
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+  <g>
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+    <tspan x="320" y="-35.575">MOSI</tspan>
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+  </text>
+</svg>
diff --git a/Documentation/mainboard/up/squared/index.md b/Documentation/mainboard/up/squared/index.md
index dcf3ed192d..9242f76d8d 100644
--- a/Documentation/mainboard/up/squared/index.md
+++ b/Documentation/mainboard/up/squared/index.md
@@ -7,6 +7,12 @@
 ### Bottom
 ![][overview_bottom]
 
+* **Legend**
+	* [BLUE][header_cn16_link]: UART0 / USB connector
+	* [GREEN][header_gpio_link]: UART1 / GPIO header
+	* [RED][header_cn22_link]: SPI header
+	* YELLOW: Indicates pin 1
+
 ## Mainboard components
 ### Platform
 ```eval_rst
@@ -46,6 +52,79 @@
 +---------------------+------------+
 ```
 
+### Debugging
+#### UART0 (CN16)
+This connector is located on the **bottom** side (see [here][overview_bottom_link]).
+![][header_cn16]
+
+
+#### UART1 (GPIO header)
+The GPIO header is located on the **bottom** side (see [here][overview_bottom_link]).
+![][header_gpio]
+
+## Building and flashing coreboot
+### Using the SPI header
+The SPI header is located on the **bottom** side (see [here][overview_bottom_link]).
+![][header_cn22]
+
+### Preperations
+In order to build coreboot, it's neccessary to extract some files from the vendor firmware. Make sure that you have a fully working dump.
+```bash
+[upsquared]$ ls
+firmware_vendor.rom
+```
+
+```bash
+[upsquared]$ mkdir extracted && cd extracted
+[extracted]$ ifdtool -x ../firmware_vendor.rom 
+File ../firmware_vendor.rom is 16777216 bytes
+Peculiar firmware descriptor, assuming Ibex Peak compatibility.
+  Flash Region 0 (Flash Descriptor): 00000000 - 00000fff 
+  Flash Region 1 (BIOS): 00001000 - 00efefff 
+  Flash Region 2 (Intel ME): 07fff000 - 00000fff (unused)
+  Flash Region 3 (GbE): 07fff000 - 00000fff (unused)
+  Flash Region 4 (Platform Data): 07fff000 - 00000fff (unused)
+  Flash Region 5 (Reserved): 00eff000 - 00ffefff 
+  Flash Region 6 (Reserved): 07fff000 - 00000fff (unused)
+  Flash Region 7 (Reserved): 07fff000 - 00000fff (unused)
+  Flash Region 8 (EC): 07fff000 - 00000fff (unused)
+```
+
+```bash
+flashregion_0_flashdescriptor.bin
+flashregion_1_bios.bin
+flashregion_5_reserved.bin
+```
+
+### Clean up
+```bash
+[coreboot]$ make distclean
+```
+
+### Configuring
+```bash
+[coreboot]$ touch .config
+[coreboot]$ ./util/scripts/config --enable VENDOR_UP
+[coreboot]$ ./util/scripts/config --enable BOARD_UP_SQUARED
+[coreboot]$ ./util/scripts/config --enable NEED_IFWI
+[coreboot]$ ./util/scripts/config --enable HAVE_IFD_BIN
+[coreboot]$ ./util/scripts/config --set-str IFWI_FILE_NAME "<flashregion_1_bios.bin>"
+[coreboot]$ ./util/scripts/config --set-str IFD_BIN_PATH "<flashregion_0_flashdescriptor.bin>"
+[coreboot]$ make olddefconfig
+```
+
+### Building
+```bash
+[coreboot]$ make
+```
+
+Now you should have a working and ready to use coreboot build at `build/coreboot.rom`.
+
+### Flashing
+```bash
+[coreboot]$ flashrom -p <your_programmer> -w build/coreboot.rom
+```
+
 ## Board status
 ### Working
 - bootblock, romstage, ramstage
@@ -78,22 +157,13 @@
 - mini PCIe
 - flashing with flashrom internally using Linux
 
-## Building and flashing coreboot
-### Building
-
-```bash
-make distclean
-touch .config
-./util/scripts/config --enable VENDOR_UP
-./util/scripts/config --enable BOARD_UP_SQUARED
-./util/scripts/config --enable NEED_IFWI
-./util/scripts/config --enable HAVE_IFD_BIN
-./util/scripts/config --set-str IFWI_FILE_NAME "<path_to_your_bios_region>"
-./util/scripts/config --set-str IFD_BIN_PATH "<path_to_your_ifd_region>"
-make olddefconfig
-```
-
-### Flashing
 
+[header_cn16]: header_cn16_10pin_uart0.svg
+[header_cn16_link]: #uart0-cn16
+[header_cn22]: header_cn22_12pin_spi.svg
+[header_cn22_link]: #using-the-spi-header
+[header_gpio]: header_40pin_gpio_uart1.svg
+[header_gpio_link]: #uart1-gpio-header
 [overview_top]: top.jpg
 [overview_bottom]: bottom.jpg
+[overview_bottom_link]: #bottom
diff --git a/Documentation/soc/intel/apollolake/flash_layout.dia b/Documentation/soc/intel/apollolake/flash_layout.dia
new file mode 100644
index 0000000000..4ea5440619
--- /dev/null
+++ b/Documentation/soc/intel/apollolake/flash_layout.dia
diff --git a/Documentation/soc/intel/apollolake/flash_layout.svg b/Documentation/soc/intel/apollolake/flash_layout.svg
new file mode 100644
index 0000000000..9322875d90
--- /dev/null
+++ b/Documentation/soc/intel/apollolake/flash_layout.svg
@@ -0,0 +1,122 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.0//EN" "http://www.w3.org/TR/2001/PR-SVG-20010719/DTD/svg10.dtd">
+<svg width="38cm" height="18cm" viewBox="118 98 744 344" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
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+    <tspan x="710" y="134.425">DEVICE_EXTENSION</tspan>
+  </text>
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+  <g>
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+  </text>
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diff --git a/Documentation/soc/intel/apollolake/index.md b/Documentation/soc/intel/apollolake/index.md
new file mode 100644
index 0000000000..d4a5ee51ae
--- /dev/null
+++ b/Documentation/soc/intel/apollolake/index.md
@@ -0,0 +1,17 @@
+# Apollolake
+## SPI flash layout
+
+![][apl_flash_layout]
+
+With Apollolake Intel invented another flash layout for x86 firmware called IFWI (Intel FirmWare Image).
+
+Usually on x86 platforms the bootblock is stored at the end of the bios region
+and the Intel ME / TXE has its own IFD region. On Apollolake both have been
+moved into the IFWI region, which is a subregion of "BIOS", since it allows to
+store multiple firmware components.
+
+The IFWI region can be manipulated by `ifwitool`.
+
+[apl_flash_layout]: flash_layout.svg
+
+
diff --git a/Documentation/soc/intel/index.md b/Documentation/soc/intel/index.md
index 86f4de7155..f30ff9a1d6 100644
--- a/Documentation/soc/intel/index.md
+++ b/Documentation/soc/intel/index.md
@@ -9,3 +9,4 @@ This section contains documentation about coreboot on specific Intel SOCs.
 - [Ice Lake/9th Gen Core-i series](icelake/index.md)
 - [MP Initialization](mp_init/mp_init.md)
 - [Firmware Interface Table](fit.md)
+- [Apollolake](apollolake/index.md)