diff options
| author | Felix Singer <felixsinger@posteo.net> | 2021-08-13 08:31:52 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-08-28 18:21:26 +0000 |
| commit | 0dcdb217cf4fe1d2e2055994930eda618e9fe892 (patch) | |
| tree | 7fe4277d10a93aa908cabdc591f1dfa40bca5b66 /Documentation | |
| parent | 621ae7c701033029352603f2978b7580295f59e3 (diff) | |
soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default
Since all mainboards use `CHIPSET_LOCKDOWN_COREBOOT`, make it the
default by changing its enum value to 0 and remove its configuration
from all related devicetrees.
If `common_soc_config.chipset_lockdown` is not configured with
something else in the devicetree, then `CHIPSET_LOCKDOWN_COREBOOT`
is used.
Also, add a release note for the upcoming 4.15 release.
Change-Id: I369f01d3da2e901e2fb57f2c83bd07380f3946a6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56967
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/releases/coreboot-4.15-relnotes.md | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/releases/coreboot-4.15-relnotes.md b/Documentation/releases/coreboot-4.15-relnotes.md index 0e2ad7e0b9..5701eb0c96 100644 --- a/Documentation/releases/coreboot-4.15-relnotes.md +++ b/Documentation/releases/coreboot-4.15-relnotes.md @@ -19,4 +19,11 @@ By using newer coreboot features like board variants and override devicetrees, lots of code can now be shared. This should ease maintenance and also make it easier for newcomers to add support for even more mainboards. +### Changed default setting for Intel chipset lockdown + +Previously, the default behaviour for Intel chipset lockdown was to let the FSP +do it. Since all related mainboards used the coreboot mechanisms for chipset +lockdown, the default behaviour was changed to that. + + ### Add significant changes here |