diff options
| author | Keith Short <keithshort@chromium.org> | 2019-05-16 11:46:27 -0600 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2019-05-22 16:52:48 +0000 |
| commit | 1835bf0fd4b77ab3eae1fb085be1667d13ed3144 (patch) | |
| tree | 3398098301f8ac691c616a98ec08c070dbaa8054 /Documentation | |
| parent | 7006458777483291abfca790beb48f201ba74c37 (diff) | |
post_code: add post code for critical CBFS failures
Add a new post code POST_INVALID_CBFS, used when coreboot fails to
locate or validate a resource that is stored in CBFS.
BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms
Change-Id: If1c8b92889040f9acd6250f847db02626809a987
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/POSTCODES | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/POSTCODES b/Documentation/POSTCODES index 2340fac049..162e863fed 100644 --- a/Documentation/POSTCODES +++ b/Documentation/POSTCODES @@ -17,6 +17,7 @@ This is an (incomplete) list of POST codes emitted by coreboot v4. 0x88 Devices have been configured 0x89 Devices have been enabled 0xe0 Boot media (e.g. SPI ROM) is corrupt +0xe1 Resource stored within CBFS is corrupt 0xf8 Entry into elf boot 0xf3 Jumping to payload |