soc/intel/common: Add method to modify GPIO community PM config

This patch adds CGPM, a helper method to configure GPIO power management
bits that are part of miscellaneous config. This is needed for
configuration of these bits on S0ix entry and exit.

BUG=b:148892882
BRANCH=none
TEST="BUILD volteer and ripto"

Signed-off-by: Venkata Krishna Nimmagadda <venkata.krishna.nimmagadda@intel.com>
Change-Id: Iac3a269d3071eb5d4100d516249eeb5ce23c02fa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40260
Reviewed-by: Venkata Krishna Nimmagadda <Venkata.krishna.nimmagadda@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

0 files changed, 0 insertions, 0 deletions