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authorFurquan Shaikh <furquan@google.com>2020-05-02 10:24:23 -0700
committerFurquan Shaikh <furquan@google.com>2020-05-02 18:45:16 +0000
commit76cedd2c292352d7dbd45fab70ec272e476d0910 (patch)
tree21fa0e33a2324e2ab93f38a90f6efd1a49ecdd76 /Documentation
parente0844636aca974449c7257e846ec816db683d0b9 (diff)
acpi: Move ACPI table support out of arch/x86 (3/5)
This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 3/5 which basically is generated by running the following command: $ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g' BUG=b:155428745 Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/Intel/SoC/soc.html2
-rw-r--r--Documentation/acpi/devicetree.md2
2 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html
index 6b1bb30740..53131c6e6f 100644
--- a/Documentation/Intel/SoC/soc.html
+++ b/Documentation/Intel/SoC/soc.html
@@ -657,7 +657,7 @@ Use the following steps to debug the call to TempRamInit:
The EDK2 data structure is defined in
MdeModulePkg/Include/IndustryStandard/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/MdePkg/Include/IndustryStandard/Acpi61.h#l111">Acpi61.h</a>
The coreboot data structure is defined in
- src/arch/x86/include/arch/<a target="_blank" href="https://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/arch/x86/include/arch/acpi.h;hb=HEAD#l237">acpi.h</a>
+ src/arch/x86/include/arch/<a target="_blank" href="https://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/arch/x86/include/acpi/acpi.h;hb=HEAD#l237">acpi.h</a>
</p>
<ol>
diff --git a/Documentation/acpi/devicetree.md b/Documentation/acpi/devicetree.md
index 556c9668f6..c3c4c2e402 100644
--- a/Documentation/acpi/devicetree.md
+++ b/Documentation/acpi/devicetree.md
@@ -157,7 +157,7 @@ Note that the ACPI_IRQ_WAKE_EDGE_LOW macro informs the platform that the GPIO
will be routed through SCI (ACPI's System Control Interrupt) for use as a wake
source. Also note that the IRQ names are SoC-specific, and you will need to
find the names in your SoC's header file. The ACPI_* macros are defined in
-``src/arch/x86/include/arch/acpi_device.h``.
+``src/arch/x86/include/acpi/acpi_device.h``.
Using a GPIO as an IRQ requires that it is configured in coreboot correctly.
This is often done in a mainboard-specific file named ``gpio.c``.