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author | Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> | 2022-01-14 11:42:02 +0530 |
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committer | Subrata Banik <subratabanik@google.com> | 2022-02-01 10:13:01 +0000 |
commit | b627964f2e08cd93c3a41a8793aef9f215d1c7e3 (patch) | |
tree | 3d3f1863936131a07db4c028275be20723a8aa6a /Documentation/vendorcode | |
parent | 18ef52083d97fa87b780b06a747a544da1dcd7d8 (diff) |
soc/intel/alderlake: Add GPP_I GPIO group for Alder Lake N SOC
Add definitions for GPP_I GPIO group pins on Alder Lake N SOC and GPIO
IRQ routing information.
GPP_I GPIO group belongs to GPIO community 1. Hence GPIO community 1 in
Alder Lake N contains GPP_S, GPP_I, GPP_H, GPP_D GPIO groups.
GPIO groups 1-6 in Doc# 645550 Chapter 36 corresponds to GPIO
communities 5-0 respectively.
BUG=b:213535859
Change-Id: Ia71a399c03cb7d098a381bd9439d448e8a620761
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61106
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/vendorcode')
0 files changed, 0 insertions, 0 deletions