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| author | Felix Held <felix-coreboot@felixheld.de> | 2019-12-28 18:09:47 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-12-29 12:19:14 +0000 |
| commit | 4902fee4412eb15bee5f5e164302730de0ce195e (patch) | |
| tree | 505f51579902c768bdef21d22559e0cc79c5e809 /Documentation/util.md | |
| parent | cf425783c8896173a74103bd4936d0c205954f83 (diff) | |
nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registers
This patch didn't change the resulting binary for an X230 when using
TIMELESS_BUILD=1
Change-Id: Ibeb10c3e0c04dec76892a86fa39e60543b2ee2f5
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37969
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'Documentation/util.md')
0 files changed, 0 insertions, 0 deletions