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| author | Youness Alaoui <youness.alaoui@puri.sm> | 2018-03-13 16:58:52 -0400 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-06-11 20:55:06 +0000 |
| commit | d8214d7e0e3083de30f269d720ab816736ed79eb (patch) | |
| tree | b2efbbe9faa7388e89a3b71bd99cfa3080a76e8e /Documentation/timestamp.md | |
| parent | cfd8929ac610f5e7ca14b92cd617270d800319f2 (diff) | |
inteltool: Add dumping of full PCR ports
SoCs from Skylake on have many settings as so called private con-
figuration registers (PCRs). These are organized as 256 ports with
a 64KiB space each. We use the Primary to Sideband (P2SB) bridge's
BAR to access them.
Change-Id: Iede4ac601355e2be377bc986d62d20098980ec35
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19593
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/timestamp.md')
0 files changed, 0 insertions, 0 deletions